1. Field of the Invention
This invention generally relates to the fabrication of large area electronic products, and more specifically to the fabrication of complimentary metal-oxide semiconductor (CMOS) circuits for add-on electronics for application-specific integrated circuits (ASICs), at low temperatures by directly depositing microcrystalline thin-film silicon (xcexcC-Si).
2. Related Art
It is known how to make CMOS circuits at temperatures in excess of 600xc2x0 C., which is the lowest temperature at which polycrystalline films can be made by thermal crystallization. These films are then processed to CMOS circuits.
An ultralow-temperature, large-area silicon technology that could furnish a tool kit of standard devices, including transistors, rectifying diodes and photodiodes is of great interest for applications in macroelectronics, and in add-on electronics for application-specific integrated circuits. The latter application of the process temperature expands the applicability of macroelectronics. A widely usable ultralow-temperature technology needs p channel and n channel field-effect transistors (FETs), which are the building blocks for complementary digital circuits n channel FETs made of directly deposited microcrystalline silicon (xcexcc-Si) indeed have been reported by: T. Nagahara, K. Fuiimoto. N. Kohno. Y. Kashiwapi and H. Kakinoki, Jpn. J. Appl. Phys. 31, 4555 (1992); J. Woo, H. Lim and J. Jane, Appl. Phys. Lett. 65, 1644 (1994); H. Meiling, A. M. Brockhoff J. K. Rath and R.E.I. Schropr), Mat. Res. Soc. Symp. Proc. 508, 31 (1998); and Y. Chen and S. Wagner, Electrochem. Soc. Proc. 98-22, 221 (1998). The fabrication of solar cells of xcexcc-Si suggests that useful hole mobilities can be obtained in xcexcc-Si. However, no p channel thin film transistors (TFTs):have been made of hydrogenated amorphous silicon (a-Si:H), which is an efficient solar cell material.
What would be desirable, but has not heretofore been developed, is a method of fabricating macroelectronic devices and ASICs at low temperatures by directly depositing xcexcc-Si and integrating a p channel TFT with an n channel TFT to form an inverter.
It is a primary object of the present invention to provide a method of making large area electronic devices at low temperatures.
It is another object of the present invention to provide a method of making CMOs circuits at low temperatures.
It is another object of the present invention to provide a method of making TFTs by directly depositing xcexcc-Si.
It is an additional object of the present invention to provide a method of integrating p channel and n channel TFTs to form an inverter.
It is even a further object of the present invention to provide a method for making p channel and n channel transistors from the same film of xcexcc-Si.
It is even an additional object of the present invention to provide a TFT wherein the p and n channels share a single xcexcc-Si layer.
A p channel TFT is made of directly deposited microcrystalline silicon (xcexcc-Si). The p TFT is integrated with its n channel counterpart on a single xcexcc-Si film, to form a complementary metal-silicon oxide-silicon (CMOS) inverter of deposited xcexcc-Si. The xcexcc-Si channel material can be grown at low temperatures by plasma-enhanced chemical vapor deposition in a process similar to the deposition of hydrogenated amorphous silicon. Either the p+ or n+layers can be grown and patterned, and then the other can be deposited and patterned. The p and n channels share the same xcexcc-Si layer.